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Meta on AMD MI350X — Origami analytical kernel selection vs autotuning — What does it mean?

The news. On October 15, 2026, Meta and AMD posted Architecting for Hardware Diversity: Meta's End-to-End Co-Design for High-Performance AI Training on AMD GPUs (arXiv 2610.22230), a case study of training recommendation models on AMD Instinct MI350X GPUs instead of NVIDIA B200. It reports up to 1.5× end-to-end training throughput over a directly ported baseline, and says the changes were upstreamed to PyTorch, Triton and ROCm. One piece is an analytical model, Origami, that chooses GEMM kernels with no tuning run. Read the paper →

Measure the truck, don't reload it

Suppose you must pack a moving truck for thousands of different moves. One approach is to test-load the truck with every layout, time each attempt, and write the winner in a notebook. It works, but only for the moves already in the notebook, and a different truck means starting the notebook over. The other approach is to measure the truck once, then work out on paper how long each layout would take to load and to drive, and pick the best answer in seconds.

That is the difference between autotuning in a compiler like Triton and Origami. The paper says earlier hipBLASLt selection was offline autotuning: enumerate kernel configurations on representative shapes and store the best in lookup tables. That fails at scale, because recommendation models execute thousands of unique GEMM shapes per model and an exhaustive table for every shape is impractical.

Origami replaces the sweep with a model of the GEMM's critical path through the memory and compute hierarchy. For each candidate tile shape it estimates two latencies and keeps the shape with the lowest total. Each candidate evaluates in nanoseconds, so the full search takes microseconds.

What the paper's arithmetic looks like

The model splits the output matrix C into tiles, one per workgroup. A workgroup walks along the K dimension, loading a tile of A and a tile of B, multiplying, and writing back. Compute latency is the number of matrix instructions per tile times each instruction's latency. Memory latency is the largest of the times to move the traffic through L2, the last-level cache (LLC) and HBM, where each level only sees the bytes that missed the level above it.

The cache hit rate itself is predicted geometrically. If MC × NC workgroups share a cache, A tiles are reused across NC workgroups and B tiles across MC, giving the paper's hit rate H = 1 − (MC·MT + NC·NT) / (MC·NC·(MT + NT)). The loop overlaps loading with computing, so a tile takes the prologue load, plus one step per K-slice at the larger of compute and memory time, plus the final store. That max is the roofline idea applied to one tile: the slower side sets the pace.

Two more effects are modelled. An issue-rate bound limits throughput when too few vector lanes are issuing loads, which pushes toward smaller tiles while reuse pushes toward larger ones. And the model counts wave quantization, then chooses tile shapes and a Stream-K grid size to shrink the idle tail.

QuestionOffline autotuningOrigami (analytical model)
How is a kernel chosen?Run candidates on the GPU, keep the fastestCompute each candidate's latency from hardware constants, keep the lowest
Cost per new matrix shapeA tuning run per shape, or a stored table entryMicroseconds for the full search, no warmup
Moving to a new chipRe-tune and rebuild the tablesLargely substituting hardware constants such as cache sizes and achievable bandwidth, per the paper
AccuracyBest observed by construction, for tuned shapes93% average selection efficiency versus exhaustively autotuned GEMM, per the paper

A worked example

Two small calculations show why the model needs no stopwatch. First, wave quantization, using the paper's own picture: an output of 4 × 5 = 20 tiles on 8 CUs takes 3 rounds, because 20 / 8 rounds up to 3. The last round has 20 mod 8 = 4 tiles, so 4 of 8 CUs sit idle and utilisation is 20 / 24 ≈ 83%. A cost model sees this from the shape alone; choosing a tile size that makes 24 tiles would remove it.

Second, the hit-rate formula with illustrative numbers: 128 × 128 tiles (illustrative) and a 4 × 4 grid of workgroups sharing one cache gives H = 1 − (4·128 + 4·128) / (16·256) = 1 − 1024 / 4096 = 0.75. Sharing across an 8 × 8 grid gives 1 − 2048 / 16384 = 0.875. More workgroups sharing the cache means less traffic reaches HBM, and that lowers the memory term in the max. Neither number required running a kernel.

Where it earns its keep, and where it stops

The model works because GEMM is regular: uniform tile shapes and predictable data movement, so, in the authors' words, its cost reduces to a hardware-parameterized roofline. It is tuned for MI350X, and the paper reports it is also integrated into tritonBLAS for zero-warmup selection at runtime. Irregular kernels do not have this property, so the paper still tunes Triton, CUDA and Inductor kernels by hand and with agentic workflows. The 1.5× end-to-end figure is the combined result of model changes, kernels and software, not of Origami alone, and the paper does not split that gain by component in the sources summarised here.

Goes deeper in: GPU & CUDA → Triton & torch.compile → How Triton Works

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